PROFILE

Address: 

Room No. FW1-SF 2, Department of Electrical Engineering
Delhi Technological University
Bawana Road, Shahbad Daulatpur, Delhi-110042, India

PREVIOUS POSITIONS/ EXPERIENCE

TEACHING (COURSES TAUGHT)

Courses Taught/Teaching :

A. Theory

  • Digital Signal Processing  (B.Tech)
  • Electromagnectic Field Theory (B.Tech)
  • Electronic Devices and Circuits  (B.Tech)
  • Digital Circuits and Systems (B.Tech)
  • Microprocessor and Microcontroller applications (B.Tech)
  • Linear Integrated Circuits (B.Tech)
  • PCB Design and Fabrication
  • IC Technology

B. Laboratory 

  • Digital Signal Processing Laboratory (B.Tech)
  • Electronic Devices and Circuits Laboratory (B.Tech)
  • Microprocessor and Microcontroller applications Laboratory (B.Tech)
  • Linear intergrated circuits Laboratory (B.Tech)
  • Basic Electrical Engineering Laboratory (B. Tech)
  • Linear Integrated Circuits (B.Tech)
  • PCB Design and Fabrication

MEMBERSHIPS

  1. IEEE
  2. ISTE
  3. IEI
  4. IAENG

PUBLICATIONS

Journal

  1. Anupama, S. Rewari, and N. Pandey, “Numerical simulation and characterization of high-power gallium nitride based Junctionless Accumulation Mode Nanowire FET (GaN-JAM-NWFET) for small signal high frequency terahertz applications,” AEU - International Journal of Electronics and Communications, vol. 174, 2024. (SCI Impact Factor- 3.2 ) Published- Jan 1, 2024
  2. Anupama, Sonam Rewari and N. Pandey, "Numerical Simulation of Core-Shell Dual Metal Gate Stack Junctionless Accumulation Mode Nanowire FET (CS-DM-GS-JAMNWFET) for Low Power Digital Applications," Micro and Nanostructures, vol. 196, p. 207995, 2024.

Conferences

1. Anupama, S. Rewari and N. Pandey, "Impact of Temperature and Noise on Gallium Nitride Junctionless Accumulation Mode Nanowire FET (GaN-JAMNWFET)," 2024 International Conference on Electrical Electronics and Computing Technologies (ICEECT), Greater Noida, India, 2024, pp. 1-5.

2. U. Gupta, S. S. Yagnik, V. Gangian and Anupama, "Low Supply QFGMOS CCCII with Low-pass and High-pass Filter Applications," 2023 3rd International Conference on Intelligent Technologies (CONIT), Hubli, India, 2023, pp. 1-5, doi: 10.1109/CONIT59222.2023.1020570.

3. S. Verma, U. Jarwal, S. Kumar and Anupama, "Low Power and Low Voltage Voltage Amplifiers and Voltage Integrators based on DTMOS CCCII," 2022 2nd International Conference on Intelligent Technologies (CONIT), Hubli, India, 2022, pp. 1-5, doi: 10.1109/CONIT55038.2022.9847861

4. D. Kumar, P. Sharma, Anupama and P. Sharma, "A Performance Study on Deep Learning Covid-19 Prediction through Chest X-Ray Image with ResNet50 Model," 2022 Second International Conference on Advances in Electrical, Computing, Communication and Sustainable Technologies (ICAECT), Bhilai, India, 2022, pp. 1-7, doi: 10.1109/ICAECT54875.2022.9807920.

5. S. Verma, U. Jarwal, S. Kumar and Anupama, "Low Power and Low Voltage Voltage Amplifiers and Voltage Integrators based on DTMOS CCCII," 2022 2nd International Conference on Intelligent Technologies (CONIT), Hubli, India, 2022, pp. 1-5, doi: 10.1109/CONIT55038.2022.9847861

BOOKS/BOOK CHAPTERS (IF ANY)

PATENTS (IF ANY)

HONOURS AND AWARDS (IF ANY)

SPONSORED/CONSULTANCY PROJECTS

START-UPS (IF ANY)

MOOC COURSES DEVELOPED (IF ANY)

PROFESSIONAL DEVELOPMENT

ADVISEES

ANY OTHER INFORMATION