Ram Murti Rawat

DEPARTMENT OF SOFTWARE ENGINEERING

Phone:0
Email: rammurtirawat@dtu.ac.in

Qualifications

Ph.D.(pursuing) DTU, Delhi; M.TECH. (IIT BHU, Varanasi India); B.E. (Jiwaji University Gwalior, Madhya Pradesh)

Areas of Interest

Analog and Digital VLSI Design , Digital systems and fault tolerance design, Computer architecture and Modelling and simulation

Work Experience:-

  • Assistant Professor, Department of Software Engineering, Delhi Technological University (Formerly Delhi College of Engineering), Delhi. (11/03/2021- till present).
  • Assistant Professor, Department of Computer Science and Engineering, Delhi Technological University (Formerly Delhi College of Engineering), Delhi. (25/07/2014- 10/03/2021).            

 

Research Papers Published in International Journals:-

  1. An Improved Fuzzy Voting Scheme for Fault Tolerant Systems, Published in International Journal of Applied Evolutionary computation (IJAEC), Volume 6, Issue 2, 2015 IGI Global, DOI=10.4018/IJAEC.2015040103. (DBLP), Ram Murti Rawat, Tarun Kumar Gupta, Mohammad Sajid, Shiv prakash, Dinesh Prasad Sahu, Sohan kumar yadav and Chanchal kumar.
  2.  Novel Fuzzy Voting Algorithm Based on Parameter Optimization for Fault Tolerant Systems J. Bioinf. Intell. Control 4, 101-105 (2015), R. M. Rawat, Shiv Prakash, and D. P. Sahu. (Scopus)
  3. Breast Cancer Detection Using Support Vector Machine With Principal Component Analysis, International Journal of Creative Research Thoughts (IJCRT), 2020, Ram Murti Rawat. (Peer-review)
  4.   A Convolutional Neural Network Driven Method Of Facial Sentiment Analysis, International Journal of Creative Research Thoughts (IJCRT), 2020,  Ram Murti Rawat. (peer-review)
  5.  A Novel Low power and Swing Restoration SRAM Logic Circuit    Technique, IJERT, Vol. 7 Issue 02, Feb.-2018, DOI:10.17577/ijertv7is020174. Ram Murti Rawat. (Peer-review)
  6. A Comparative Study of 6T and 8T SRAM Cell With Improved Read and Write Margins in 130 nm CMOS Technology, WSEAS Transactions on Circuits and Systems, ISSN / E-ISSN: 1109-2734 / 2224-266X, Volume 19, 2020, Art. #2, pp. 13-18. Ram Murti Rawat, Vinod Kumar. (Peer-review)
  7. Restoration circuits for low power reduce swing of 6T and 8T SRAM cell with improved read and write margins, International Journal of Reconfigurable and Embedded Systems (IJRES),  Vol. 10, No. 2, July 2021, pp. 130~136 ISSN: 2089-4864, DOI: 10.11591/ijres.v10.i2.pp130-136, Ram Murti Rawat, Vinod Kumar. (Scopus)
  8. Theoretical study on Restoration Circuits for Low Power Reduce Swing of 6T and 8T SRAM Cell with Improved Read and Write Margins, WSEAS TRANSACTIONS ON ACOUSTICS AND MUSIC, ISSN / E-ISSN: 1109-9577 / , Volume 7, 2020, Art. #4, pp. 22-34.Vinod Kumar, Ram Murti Rawat. (Peer-review)
  9. Low Power Restoration Circuits Reduce Swing Voltages of SRAM Cell With Improved Read and Write Margins,  International Journal of Security and Privacy in Pervasive Computing (IJSPPC) 13(2), 2021 |Pages: 13 DOI: 10.4018/IJSPPC.2021040102, Vinod Kumar, Ram Murti Rawat (peer-review)

Research Papers Published in International Conferences:-

  1. Dementia Detection Using Machine Learning by Stacking ModelsInternational Conference on Communication and Electronics Systems (ICCES), 2020, DOI: 10.1109/ICCES48766.2020.09137852 ,  Ram Murti Rawat.  (Scopus)                                                                 
  2.   Analysis of Facial Sentiments: A deep-learning Way, International Conference on Electronics and Sustainable Communication Systems, ICESC, 2020, DOI: 10.1109/ICESC48915.2020.9155622, Ram Murti Rawat.    (Scopus)                                                  
  3. An embedding-based deep learning approach for movie recommendation, International Conference on Communication and Electronics Systems, ICCES, 2020, DOI: 10.1109/ICCES48766.2020.09137998, Ram Murti Rawat.       (Scopus) 
  4. Breast Cancer Detection Using K-Nearest Neighbors, Logistic Regression and Ensemble Learning, International Conference on Electronics and Sustainable Communication Systems (ICESC), 2020, DOI: 10.1109/ICESC48915.2020.9155783, Ram Murti Rawat. (Scopus)
  5. COVID-19 Detection using Convolutional Neural Network Architectures based upon Chest X-rays Images, International Conference on Intelligent Computing and Control Systems (ICICCS), 2021, DOI: 10.1109/ICICCS51141.2021.9432134, Ram Murti Rawat. (Scopus)
  6. AI based Impact of COVID 19 on food industry and technological approach to mitigate, International Conference on Intelligent Computing and Control Systems (ICICCS), 2021, DOI: 10.1109/ICICCS51141.2021.9432152, Ram Murti Rawat. (Scopus)
  7. Low power pre-charge voltage level and low swing logic based 8T SRAM cell for high speed CMOS circuits, 32nd IEEE International Conference on Microelectronics (MIEL-2021), Held at Nis University, Serbia. (Accepted), Ram Murti Rawat, Vinod Kumar. (Scopus)                                                                    

Reviewer for International Journals:-

  1. International journal of electronics.
  2. Journal of circuits, systems, and computers (JCSC).
  3. Walailak journal of science and technology (WJST).
  4. World Scientific and Engineering Academy and Society (WSEAS) Transactions.
  5. International Journal of Modeling, Simulation, and Scientific Computing (IJMSSC).

Reviewer for International Conferences:-

  1. IEEE India International Conference on Information Processing(IICIP-2016),Held at DTU, Delhi.
  2. 32nd IEEE International Conference on Microelectronics (MIEL-2021), Held at Nis University, Serbia.
  3. IEEE International Conference on Electrical, Computer, and Energy Technologies (ICECET'21), Held at Cape Town, South Africa on 09-10 December 2021.
  4. IEEE International Conference on Electrical, Computer, Communications, and
    Mechatronics Engineering (ICECCME 2021), Held at Mauritius on 07-08 October 2021.
  5. 2nd IEEE IAS International Conference on Computational Performance Evaluation (ComPE-2021), Held at Department of Biomedical Engineering, North-Eastern Hill University (NEHU) during 1st-3rd December 2021. 

Workshop and FDP attended: -

  1. TEQUIP-II Sponsored Faculty Development Program on Advances in Department of CSE, DTU, January 18-22, 2016.
  2. A Six Day Technical Skill Enhancement Workshop on SRAM Design (Specs finalization to tapeout) from 5-10 october 2017 at Bharati Vidyapeeth’s College of Engineering, Paschim Vihar, New Delhi.
  3. ISEA Project-II sponsored five days online Faculty Development Program on Internet of Things with Machine Learning and Artificial Intelligence organized by GTU - Graduate School of Engineering and Technology in association with Centre for Continuing Education, National Institute of Technology, Warangal during 14th - 18th September, 2020.               
  4. One week online Faculty Development Program on “Nascent Methodologies, Challenges and Realms of Research” held from 03 to 07 October, 2020 organized by Department of Electronics and Communication Engineering, Delhi Technological University, Delhi, India.
  5. AICTE-ISTE approved Orientation/ Refresher programme on “Use of ICT in Engineering Education” held during 15.03.2021 to 20.03.2021 organized by Maharaja Surajmal Institute of Technology, Janakpuri, New Delhi.
  6. This is certified that Ram Murti Rawat, Assistant Professor of Delhi Technological University, Delhi participated & completed successfully AICTE Training And Learning (ATAL) Academy Online Elementary FDP on "Electret Applications in Sensors, Microelectronics and Actuators" from 2021-07-05 to 2021-07-09 at Shri.G.S.I.T.S, Indore.
  7. This is certified that Ram Murti Rawat, Assistant Professor of Delhi Technological University, Delhi participated & completed successfully AICTE Training And Learning (ATAL) Academy Online Elementary FDP on "Foundation of Data Science & its Applications" from 26/07/2021 to 30/07/2021 at Indira Gandhi Delhi Technical University for Women.

Responsibilities Held:-

      1. Minor Project Coordinator, CSE and IT Department, DTU, Delhi.

      2. ISO Work CSE Department, DTU, Delhi.

      3. Computer Network Lab In charge, SWE Department, DTU, Delhi.

      4. Time Table In charge Member, SWE Department, DTU, Delhi.

Technical Skills:-

  1. Language Known: C
  2. HDL Languages: Verilog and VHDL.
  3. Tools :  Virtuoso schematic Editor (Cadence tool).
  4. Operating System:  Windows-XP, Windows 7 and LINUX.

Courses Taught (U.G. Level):-

  1. Computer Organization and Architecture.
  2. Digital Electronics.
  3. Modelling and Simulation.
  4. VLSI Design

Teaching Methodology:-

  1. Theory Lectures.
  2. Power Point Slides (For Various Architectures).
  3. Assignment (Theory and Practical’s).
  4. Class Tests.

                                                                                               

     

Last Updated : 2021-11-22 05:49:41