Neeta Pandey

Electronics and Communication Engineering

Phone:0
Email: neetapandey@dce.ac.in

Qualifications

M. E. (Microelectronics) Ph. D.

Areas of Interest

Analog and Digital VLSI Design, Current mode ADC Design

Summary

Motivatied Teaching Professional with approximately 26.5 years teaching and research experience in Electronics and Communication Engineering. Accomplished lecturer who effectively articulates information and responds honestly to questions from students.

Highlights

  • Inspiring teacher with Effective Communication
  • Uphold high morale and ethics of this noble profession

Subjects Taught 

  • VLSI Design
  • Deep Submicron VLSI Design
  • Basic and Advanced courses in Digital Electronics
  • Computer Architecture
  • Analog Filter design
  • Analog Integrated Circuits

Honours, awards and recognitions acquired by faculty

         Excellence in research Award from Delhi Technological University Delhi for research papers published in year 2018.

         Outstanding Branch Councellor award from IEEE USA 2008 and cash prize of US $500.

         Outstanding Branch Councellor award from IEEE Delhi Section 2008.

         Inclusion in Marquis Who’s who 2010

         National Scholarship for class 10

         Member Editorial Board, AEU Int. J. Electronics and Communication

         Designated reviewer for International Journals published by Weily, IET, Taylor and Francis, Springer and Elsevier.

         Designated reviewer for International Conferences

          Member of Technical Program Committee of International Conferences

         Member of professional societies such as IEEE, Women in Engineering (WIE), an affinity group of IEEE, ISTE.

         Served as Excom member and Secretary of WIE, Delhi Section of region 10 for past two consecutive terms.

Accomplishment

    

  • Contributing author to 113 review publications in various international journals and 90 international conferences.
  • Coauthored books

                         - IC Analog Filter, LAP Lambert Academic Publishing ISBN 978-3-8433-6007-4, 2011

- Wave Filter: A Wave Active Equivalence Design Approach LAP Lambert Academic Publishing ISBN 978-3844381696, 2011

 - Realization of analog controllers using OTRA, LAP Lambert Academic Publisher, West Germany, 2012. ISBN no. 978-3-659-16439-2

  • Member of professional societies such as IEEE (Senior Member), Women in Engineering (WIE), an affinity group of IEEE, ISTE.
  • Awards/ Recognition
  •        Outstanding Branch counselor award from IEEE USA 2008 and cash prize of US $500.
  •        Outstanding Branch Counselor award from IEEE Delhi Section 2008
  •         Inclusion in Marquis Who’s who 2010 

PUBLICATIONS

International  Journal

 

  1. Yuce, E., Verma, R., Pandey, N. and Minaei, S.  New CFOA-based first-order all-pass filters and their applications. AEU - International Journal of Electronics and Communications, 103, pp.57-63, 2019.
  2. Gupta, S., Gupta, K., Calhoun, B. H., & Pandey, N. Low-Power Near-Threshold 10T SRAM Bit Cells With Enhanced Data-Independent Read Port Leakage for Array Augmentation in 32-nm CMOS. IEEE Transactions on Circuits and Systems I: Regular Papers, 66(3), 978–988, 2019.
  3. M Gupta, K Gupta, N Pandey. A design of low leakage cache memory cell for high performance processors. Journal of Information and Optimization Sciences 40 (2), 279-290, 2019
  4. R Verma, N Pandey, R Pandey. CFOA based low pass and high pass fractional step filter realizations. AEU-International Journal of Electronics and Communications 99, 161-176, 2019
  5. M. Tiwari, N Pandey, SK Paul, M. Rizvi. Programmable CCCII: Reliability Analysis and Design Methodology. IET Circuits, Devices & Systems, 2019
  6. G Komanapalli, R Pandey, N Pandey. New sinusoidal oscillator configurations using operational transresistance amplifier. International Journal of Circuit Theory and Applications, 2019
  7. A Jain, N Pandey, P Jain. FPGA-Based Architecture for Implementation of Discrete Sine Transform. Advances in System Optimization and Control, 13-22, 2019
  8. P Pahalwan, P Tripathi, P Gola, N Pandey, D Nand, Programmable Gain Amplifier Using Operational Floating Current Conveyors, AEU-International Journal of Electronics and Communications, 2018
  9. S. Gupta, K. Gupta, N. Pandey, Pentavariate Vmin Analysis of a Subthreshold 10T SRAM Bit Cell With Variation Tolerant Write and Divided Bit-Line Read IEEE Transactions on Circuits and Systems I: Regular Papers 2018
  10. V Bhatnagar, P Kumar, N Pandey, S Pandey, A dual V t disturb-free subthreshold SRAM with write-assist and read isolation, Journal of Semiconductors 39 (2), 025002, 2018
  11. V Bhatnagar, P Kumar, N Pandey, S Pandey,  A boosted negative bit-line SRAM with write-assisted cell in 45 nm CMOS technology Journal of Semiconductors 39 (2), 025001, 2018
  12. S Oruganti, Y Gilhotra, N Pandey, R Pandey, OTRA Based Piece-Wise Linear VTC Generators and Their Application in High-Frequency Sinusoid Generation, Advances in Electrical and Electronic Engineering 15 (5), 806-814, 2018
  13. D Nand, N Pandey, New Configuration for OFCC-Based CM SIMO Filter and its Application as Shadow Filter, Arabian Journal for Science and Engineering, 1-12, 2018
  14. N Pandey, B Choudhary, K Gupta, A Mittal, New Sleep-Based PFSCL Tri-State Inverter/Buffer Topologies, Journal of Circuits, Systems and Computers, 1750186, 2017
  15. R  Verma, N Pandey, R Pandey, Electronically Tunable Fractional Order Filter, Arabian Journal for Science and Engineering, 1-14, 2017
  16. N. Pandey, V. Kumar, A. Goel, A. Gupta, Electronically tunable LC high pass ladder filter using OTRA, 10.21917/ijme.2017.0079, 2017
  17. S. Gupta, K. Gupta, N. Pandey, A 32-nm Subthreshold 7T SRAM Bit Cell With Read Assist IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 25 Issue 12, pp. 3473-3483, 2017
  18. L Safari, N Pandey, N Herencsar, F Khateb, Special Issue on Current-Mode Circuits and Systems; Recent Advances, Design and Applications, AEU-International Journal of Electronics and Communications, 2017
  19. K Gupta, N Pandey, M Gupta, Dynamic positive feedback source-coupled logic (D-PFSCL) International Journal of Electronics 103 (10), 1626-1638, 2016
  20. N Pandey, K Gupta, B Choudhary, New Proposal for MCML Based Three-Input Logic Implementation, VLSI Design 2016
  21. P Bajpai, N Pandey, K Gupta, S Bagga, J Panda, On Improving the Performance of Dynamic DCVSL Circuits, Journal of Electrical and Computer Engineering 2017
  22. V Bhatia, N Pandey, Modified Tang and Pun’s Current Comparator and Its Application to Full Flash and Two-Step Flash Current Mode ADCs, Journal of Electrical and Computer Engineering 2017
  23. G Komanaplli, N Pandey, R Pandey New Realization of Quadrature Oscillator using OTRA International Journal of Electrical and Computer Engineering (IJECE) vol. 7,No.  1815-1823 Aug 2017
  24. R Verma, N Pandey, R Pandey, Electronically Tunable Fractional Order All Pass Filter, IOP Conference Series: Materials Science and Engineering 225 (1), 012229, 2017
  25. P Gupta, R Pandey, N Pandey, Voltage Mode Single CDBA Based Multifunction Filter IOP Conference Series: Materials Science and Engineering 225 (1), 012243, 2017
  26. G Komanapalli, N Pandey, R Pandey, Single OTRA Based Low Frequency Sinusoidal Oscillator Realization, IOP Conference Series: Materials Science and Engineering 225 (1), 012151, 2017
  27. D Nand, N Pandey, Transadmittance Mode First Order LP/HP/AP Filter and its Application as an Oscillator, IOP Conference Series: Materials Science and Engineering 225 (1), 012150, 2017
  28. D Nand, N Pandey, A New Proposal for OFCC-based Instrumentation Amplifier, International Journal of Electrical and Computer Engineering 7 (1), 134, 2017
  29. N Pandey, G Varshney, R Pandey, Differential Voltage Current Conveyor Realization based on CMOS Inverters, i-Manager's Journal on Electronics Engineering 7 (2), 14,2016
  30. N Pandey, R Pandey, Nikunj Sabharwal, Realization of Diode-Free OTRA based Time Marker Generator, i-Manager's Journal on Electronics Engineering 7 (1), 16,2016
  31. K. Gupta, P Gupta, R Pandey, N Pandey CDBA -Current Based Instrumentation Amplifier, Journal of Communications Technology, Electronic s and Computer Science, Issue 4, 2016
  32. Nitish, N Pandey, K Gupta, M K Saini, DFAL based flexible multi-modulo prescaler,  ICTACT Journal on Microelectronics, pp. 273-280, 2016
  33. N Saxena, S Dutta, N Pandey, An Efficient Hybrid PFSCL based Implementation of Asynchronous Pipeline, i-Manager's Journal on Circuits & Systems 4 (3), 6 - 14, 2016
  34. N Pandey, K Gupta, G Bhatia, B Choudhary, “MOS Current Mode Logic Exclusive-OR Gate using Multi-Threshold Triple-Tail Cells”, Microelectronics Journal. Vol. 57, pp. 13–20, 2016
  35. N Pandey, K Gupta, B Choudhary, “New proposal for MCML based three input logic implementation”, VLSI Design, Vol. 2016 (2016), Article ID 8712768, 10 pages
  36. R Pandey, N Pandey, N Singhal, “Single VDTA Based Dual Mode Single Input Multi output Biquad Filter”, Journal of Engineering, Volume 2016 (2016), Article ID 1674343, 10 pages,
  37. D Nand, N Pandey, “A new proposal for OFCC based Instrumentation Amplifier”, International Journal of Electrical and Computer Engineering, Vol. 7, No 1, pp. 31 – 39, 2016.
  38. S Kumari, S Gupta, N Pandey, R Pandey, R Anurag, “LC-ladder filter systematic implementation by OTRA”, International Journal Engineering Science and Technology, Vol. 19, Issue 4, December 2016
  39. P Kumar, N Pandey, S K Paul, “Operational Simulation of LC Ladder Filter Using VDTA”, Active and Passive Electronic Components, Vol. 2017, Article ID 1836727, 8 pages
  40. V Bhatia, N Pandey, “Modified Tang’s Current Comparator and Its Application to Full Flash and Two-Step Flash Current Mode ADCs”, Journal of Electrical and Computer Engineering, Vol. 2017 (2017), Article ID 8245181, 12 pages
  41. N Pandey, D Nand, R Pandey, “Generalised operational floating current conveyor based instrumentation amplifier”, IET Circuits, Devices & Systems 10 (3), 209-219,2016
  42. N Pandey, D Nand, VV Kumar, VK Ahalawat, C Malhotra “Realization of OFCC based Transimpedance Mode Instrumentation Amplifier”, Advances in Electrical and Electronic Engineering 14 (2), 162-167, 2016
  43. N Pandey, D Garg, K Gupta, and B Choudhary, “Hybrid Dynamic MCML Style: A High Speed Dynamic MCML Style”, Journal of Engineering, Volume 2016 (2016), Article ID 8027150, 10 pages
  44. N Pandey, A Mittal, B Choudhary, K Gupta, “Bus Implementation using New Low Power PFSCL Tri-state buffers”, Active and Passive Electronic Components (in Press)
  45. K Gupta, N Pandey, M Gupta, “Dynamic Positive-Feedback Source-Coupled Logic (D-PFSCL)”, International Journal of Electronics, Jan. 2016, available online
  46. Neeta Pandey, Rajeshwari Pandey, Approach for third order quadrature oscillator realisation, IET Circuits, Devices & Systems 9 (3), 161-171, 2015.
  47. Neeta Pandey, Pravin Kumar, Sajal K Paul, Voltage differencing transconductance amplifier based resistorless and electronically tunable wave active filter, Analog Integrated Circuits and Signal Processing, 1-11, 2015
  48. Neeta Pandey, Bharat Choudhary, Improved tri-state buffer in MOS current mode logic and its application,  Analog Integrated Circuits and Signal Processing, 333-340, 2015
  49. Rishi Pal, Rajeshwari Pandey, Neeta Pandey, Ramesh Chandra Tiwari, Single CDBA Based Voltage Mode Bistable Multivibrator and Its Applications, Circuits and Systems 6 (11), 237
  50. Rajeshwari Pandey, Neeta Pandey, Surabh Chittranshi, Sajal K Paul, Operational Transresistance Amplifier Based PID Controller, Advances in Electrical and Electronic Engineering 13 (2), 171-181, 2015.
  51. Neeta Pandey, Kirti Gupta, Maneesha Gupta, An efficient triple-tail cell based PFSCL, Microelectronics Journal, pp. 1001-1007, 2014.
  52. Neeta Pandey; Deva Nand; Zubair Khan, Operational floating current conveyor-based single-input multiple-output transadmittance mode filter. Arab J. Sci Eng (Springer), Journal No.13369, Article No.1369, Accepted 30 May 2014
  53. Rajeshwari Pandey, Neeta Pandey, Romita Mullick, Sarjana Yadav and Rashika Anurag "All Pass Network based MSO using OTRA, Advances in Electronics Volume 2015 (2015), Article ID 382360, 7 pages
  54. Ranjana Sridhar, Neeta Pandey, Asok Bhattacharyya, Veepsa Bhatia, High Speed High Resolution Current Comparator and its Application to Analog to Digital Converter" J. Inst. Eng. India Ser. B, http://link.springer.com/article/10.1007/s40031-015-0189-1
  55. Rajeshwari Pandey,Neeta Pandey, Gurumurthy Komanapalli, and Rashika Anurag, OTRA Based Voltage Mode Third Order Quadrature Oscillator,  ISRN Electronics, Volume 2014 (2014), Article ID 126471, 5 pages
  56. Neeta Pandey, Rajeshwari Pandey, Ranjana Sridhar, Veepsa Bhatia , Alok Kumar Singh , Pradeep Kumar, CDTA based current mode ADC, International Journal of Advance Research In Science And Engineering http://www.ijarse.com IJARSE, Vol. No.3, Special Issue (01), 2014 pp. 499 -505
  57. Ayush Tayal, Neeta Pandey,  Rajeshwari Pandey, Residue adder based high speed 8-bit vedic multiplier, International Journal of Electrical and Electronics Engineers ISSN- 2321-2055 (E) http://www.arresearchpublication.com IJEEE, Vol. No.6, 2014,  pp. 158 – 162.
  58. Neeta Pandey, Kirti Gupta, Rajeshwari Pandey, Rishi Pandey, Tanvi Mittal, Novel oscillators in subthreshold regime, International Journal of Electrical and Electronics Engineers, Vol..6, 2014, pp. 151 – 156
  59. Navin Singhal, Rajeshwari Pandey, Neeta Pandey, Dual mode biquadratic filter using single VDTA, International Journal of Electrical and Electronics Engineers, Vol..6, 2014, pp. 134 – 139
  60. Kirti Gupta, Neeta Pandey, Maneesha Gupta, Analysis and design of MOS current mode logic exclusive-OR gate using triple-tail cells, Microelectronics Journal, Volume 44, Issue 6, pp. 561–567, 2013.
  61. Kirti Gupta, Neeta Pandey, Maneesha Gupta,Low-Voltage MOS Current Mode Logic Multiplexer, Radioengineering, pp. 259-268, 2013.
  62. Kirti Gupta, Neeta Pandey, and Maneesha Gupta, MCML D-Latch Using Triple-Tail Cells: Analysis and Design, Active and Passive Electronic Components, Volume 2013 (2013), Article ID 217674, 9 pages
  63. Mayank Bothra, Rajeshwari Pandey, Neeta Pandey, Sajal K. Paul, Operational Trans-Resistance Amplifier Based Tunable Wave Active Filter, Radioengineering, 22, pp. 159 -166 , 2013
  64. Neeta Pandey, and Sajal K. Paul, Mixed mode universal filter, J Circuit Syst. Comp. (2013) DOI: 10.1142/S0218126612500648
  65. Neeta Pandey, Praveen Kumar, and Jaya Choudhary, Current Controlled Differential Difference Current Conveyor Transconductance Amplifier and Its Application as Wave Active Filter, ISRN Electronics, Volume 2013 (2013), Article ID 968749, 11 pages
  66. Neeta Pandey, Sakshi Arora, Rinku Takkar, and Rajeshwari Pandey, DVCCCTA-Based Implementation of Mutually Coupled Circuit, ISRN Electronics, Vol. 2012 (2012), Article ID 303191, 6 pages
  67. Neeta Pandey , Rajehwari Pandey, Current Mode Full-Wave Rectifier Based on a Single MZC-CDTA Active and Passive Electronic Components Volume 2013 (2013), Article ID 967057, 5 pages
  68. Neeta Pandey, Deva Nand, and Zubair Khan, Single-Input Four-Output Current Mode Filter Using Operational Floating Current Conveyor, Active and Passive Electronic Components, Volume 2013 (2013), Article ID 318560, 8 pages
  69. Neeta Pandey, Aseem Sayal, Manan Tripathi and Rajeshwari Pandey, Realization of S-G Shapers for Detector Readout Front Ends, Elixir Signal Processing 66 , pp. 20690-20699, 2014
  70. Neeta Pandey, Veepsa Bhatia, Asok Bhattacharyya, A reference generating inverter-switching-threshold- voltage based current comparator, Journal of Electron Devices, Vol. 14, , pp. 1100-1103, 2012.
  71. Neeta Pandey, Rajeshwari Pandey and Sajal K. Paul A first order all pass filter and its application in a quadrature oscillator, Journal of Electron Devices, Vol. 12, pp. 772-777, 2012.
  72. Ranjana Sridhar, Neeta Pandey, Veepsa Bhatia, Asok Bhattacharyya, New realization of current comparator and its application as current mode ADC, Journal of Electron Devices, Vol. 14, pp. 1186-1189, 2012,
  73. Rajeshwari Pandey, Neeta Pandey, B. Sriram, and Sajal K. Paul, Single OTRA Based Analog Multiplier and Its Applications, ISRN Electronics, Vol. 2012 (2012), Article ID 890615, 7 pages
  74. Rajeshwari Pandey, Neeta Pandey, B. Sriram,  Sajal K. Paul, Single OTRA Based Analog Multiplier and Its Applications,  ISRN Electronics  vol. 2012 (2012), Article ID 890615, 7 pages
  75. Rajeshwari Pandey, Neeta Pandey, and Sajal K. Paul Electronically Tunable Transimpedance Instrumentation Amplifier based on OTRA, Journal of Engineering (Hindawi) Volume 2013, Article ID 648540, 5 pages, doi.org/10.1155/2013/648540.
  76. Kirti Gupta, Neeta Pandey, Maneesha Gupta, MOS Current Mode Logic with Capacitive Coupling, ISRN Electronics, vol. 2012, Article ID 473257, 7 pages, 2012. doi:10.5402/2012/473257.
  77. Kirti Gupta, Neeta Pandey, Maneesha Gupta, Multi-Threshold MOS Current Mode Logic based Asynchronous Pipeline Circuits, ISRN Electronics Vol. 2012 (2012), Article ID 529194, 7 pages
  78. Kirti Gupta, Neeta Pandey, Maneesha Gupta, Low-Power Tri-State Buffer in MOS Current Mode Logic, Analog Integrated Citrcuits and signal processing. April 2013, Volume 75, Issue 1, pp 157-160
  79. Rajeshwari Pandey, Saurabh Chitransi, Neeta Pandey, Chandra Shekhar. Single OTRA based PD Controllers, International Journal of Engineering Science and Technology, vol. 4, pp.1426-1437, 2012.
  80. Rajeshwari Pandey, Neeta Pandey, Sajal K. Paul, Ajay Singh, B. Sriram, Kaushalendra Trivedi, Voltage Mode OTRA MOS-C Single Input Multi Output Biquadratic Universal Filter, Advances in Electrical and Electronic Engineering, vol.10,  pp. 337-344, 2012.
  81. Rajeshwari Pandey, Neeta Pandey, Sajal K. Paul, Voltage Mode Pulse Width Modulator Using Single Operational Transresistance Amplifier, Journal of Engineering, Volume 2013, Article ID 309124, 6 pages, doi.org/10.1155/2013/309124.
  82. Rajeshwari Pandey, Neeta Pandey, Sajal K. Paul, Ajay Singh, B. Sriram, Kaushalendra Trivedi, Novel grounded inductance simulator using single OTRA, International Journal of Circuit Theory and Application,Volume 42, Issue 10, pages 1069–1079, October 2014
  83. Neeta Pandey, Sajal K. Paul,SIMO Mixed Mode Universal Filter Journal of Active and Passive Electronic Devices, 7, pp. 215-226, 2012.
  84. Rajeshwari Pandey, Neeta Pandey, Tushar Negi, and Vivek Garg, CDBA Based Universal Inverse Filter, ISRN Electronics, Volume 2013 (2013), Article ID 181869, 6 pages
  85. Rajeshwari Pandey, Neeta Pandey, Sajal K. Paul, Kashish Anand, and Kranti Ghosh Gautam, Voltage Mode Astable Multivibrator Using Single CDBA, ISRN ElectronicsVolume, 2013 (2013), Article ID 390160, 8 pages
  86. Neeta Pandey, Praveen Kumar  Realization of Resistorless Wave Active Filter using Differential Voltage Current Controlled Conveyor Transconductance Amplifier, Radioengineering, Vol. 20, 911-916, 2011
  87. Neeta Pandey and Sajal K. Paul Differential Difference Current Conveyor Transconductance Amplifier: A New Analog Building Block for Signal Processing,
    Journal of Electrical and Computer Engineering, Vol. 2011 (2011), Article ID 361384, 10 pages
  88. Neeta Pandey and Sajal K. Paul Single CDTA-Based Current Mode All-Pass Filter and Its Applications, Journal of Electrical and Computer Engineering Vol. 2011 (2011), Article ID 897631, 5 pages
  89. Kirti Gupta, Ranjana Sridhar, Jaya Chaudhary, Neeta Pandey, and Maneesha Gupta New Low-Power Tristate Circuits in Positive Feedback Source-Coupled Logic, Journal of Electrical and Computer Engineering Vol. 2011 (2011), Article ID 670508, 6 pages
  90. Neeta Pandey, Praveen Kumar  Differential voltage current conveyor transconductance amplifier based wave active filter Journal of Electron Devices, Vol. 10, 2011, pp. 429-432
  91. Neeta Pandey, Rishik Bazaz, and Rahul Manocha MO-CCCCTA-Based Floating Positive and Negative Inductors and Their Applications, Journal of Electrical and Computer Engineering Vol. 2011 (2011), Article ID 150354, 8 pages,
  92. Rajeshwari Pandey, Neeta Pandey, Sajal K. Paul, A. Singh, B. Sriram, and K. Trivedi
    New Topologies of Lossless Grounded Inductor Using OTRA, Journal of Electrical and Computer Engineering Vol. 2011 (2011), Article ID 175130, 6 pages
  93. Rajeshwari Pandey, Neeta Pandey, Mayank Bothra, and Sajal K. Paul
    Operational Transresistance Amplifier-Based Multiphase Sinusoidal Oscillators, Journal of Electrical and Computer EngineeringVol. 2011 (2011), Article ID 586853, 8 pages
  94. Neeta Pandey and Sajal K Paul, “VM and CM Universal Filters Based on single DVCCTA”, Active and Passive Electronic Component Vol. 2011 (2011), Article ID 929507, 7 pages.
  95. Sajal K. Paul  and Neeta Pandey, “ A novel current mode channel select filter for multi  standard wireless receiver”,  Journal of Active and Passive Electronic Devices, vol. 6 , (3-4), pp. 327-332, , 2011.
  96. Kirti Gupta, Neeta Pandey, Maneesha Gupta, “A new active shunt-peaked MCML based high performance 1:8 demultiplexer for serial communication”, International Journal of Engineering Science and Technology, vol. 2(9), pp. 4632-4639, 2010.
  97. Veepsa Bhatia, Neeta Pandey and Asok Bhattacharyya, “Application based comparison of different analog to digital converter architectures”, International Journal of Engineering Science and Technology, vol. 2(8), pp. 3396-3404, 2010.
  98. Veepsa Bhatia, Neeta Pandey and Asok Bhattacharyya, “A 4-bit expandable current mode ADC based on different current comparator architectures”, International Journal of Engineering Science and Technology, vol. 2 (12), pp. 7380-7384, 2010.
  99. Rajeshwari Pandey Neeta Pandey, and Rashika Anurag, “Voltage Reference Circuits: A Classification”, International Journal of Engineering Science and Technology, vol. 2(9, pp. 4929-4935), 2010.
  100. Neeta Pandey, Sajal K. Paul and A. Bhattachryya, “Realization of Generalized Mixed Mode Universal Filter Using CCCIIs”, Journal of Active and Passive Electronic Devices, vol.5, pp. 279 -293, 2010.
  101.  Neeta Pandey, Sajal K. Paul, “Digitally Switched Current Mode Universal Filter”, Journal of Active and Passive Electronic Devices, vol. 5, pp.197-208, 2010.
  102. Neeta Pandey, and Sajal K. Paul, “SIMO Transadmittance mode Active - C Universal Filter” Circuit and Systems, 1, pp. 54 - 58, 2010.
  103. Neeta Pandey, Sajal K. Paul and S.B.Jain, “Voltage Mode Tow Thomas Universal Filter: A Current Controlled Conveyor Approach”, Journal of Active and Passive Electronic Devices, vol.5, pp.105 -113, 2010.
  104. Neeta Pandey, Sajal K. Paul and A. Bhattachryya, “Realization of Generalized Mixed Mode Universal Filter Using CCCIIs” Journal of Active and Passive Electronic Devices, vol.5, pp. 279 -293, 2010.
  105. Neeta Pandey, Sajal K. Paul and S.B.Jain, “A new electronically   tunable current mode universal filter using MO-CCCII”, Analog Integrated Circuits for Signal Processing,  58, 171-178, 2009.
  106. Neeta Pandey, Sajal K. Paul, and S.B.Jain, “New High-Input Impedance Voltage-Mode Universal Biquad: Multi Input Multi Output”, Journal of Active and Passive Electronic Devices, vol.3, pp.93-100, 2008.
  107. Neeta Pandey, Sajal K. Paul, and S.B.Jain,  “Voltage Mode Universal Filter using Two Plus Type CCIIs”, Journal of Active and Passive Electronic Devices, vol.3, pp.165-173, 2008.
  108. Neeta Pandey and Sajal K. Paul,  “A Novel electronically Tunable Sinusoidal Oscillator Based on CCCII(IR)”, Journal of Active and Passive Electronic Devices, vol.3, pp.134-141, 2008.
  109. Neeta Pandey, Sajal K. Paul, Asok Bhattacharyya, and S.B.Jain, “Insensitive Mixed Mode Biquad Using Reduced Number of Active and Passive Components”, Journal of Active and Passive Electronic Devices, vol.2, pp.117-125, 2007.
  110. Neeta Pandey, Sajal K. Paul, Ashok Bhattacharyya and S.B. Jain, “A new mixed mode biquad using reduced number of active and passive elements”, IEICE Electronics Express, vol.3, no.6, pp.115-121, 2006.
  111. Neeta Pandey and Sajal K. Paul,  “Multi-input Single-output Universal Current Mode Biquad”, Journal of Active and Passive Electronic Devices, vol.1, pp229-240, 2006.
  112. Neeta Pandey, Sajal K. Paul, Ashok Bhattacharyya and S.B. Jain, “A novel current controlled current mode universal filter : SITO approach”, IEICE Electronics Express, Vol. 2, No. 17, 451-457. 2005.
  113. Neeta Pandey and Sajal K. Paul, “All Pass filter based on CCII- and CCCII-“, Int. Journal of Electronics, v. 91, pp. 485-489, 2004

 

International Conference:

  1. V Bhatia, N Pandey, SR Prasanthi,  Design of an SCL logic based Current Comparator,- 2018 IEEE 61st International Midwest Symposium on circuit and systems, pp.1134-1137, 2018
  2. R. Pandey, N. Pandey, OTRA Based Log and Antilog Amplifiers, 2018 IEEE 61st International Midwest Symposium on circuit and systems, pp.182-185, 2018
  3. P. Khatter,  N. Pandey, K. Gupta, An Arithmetic and Logical Unit using Reversible Gates 2018 International Conference on Computing, Power and Communication Technologies (GUCON), pp. 476 - 480
  4. R. Sivaram,K. Gupta, N. Pandey, New Improved Low Power Triple Tail Cell with Controlled Current Source, 2018 International Conference on Computing, Power and Communication Technologies (GUCON), pp. 462 - 466
  5. P Dalmia, A Parashar, A Tomar, N Pandey, Novel High Speed Vedic Multiplier Proposal Incorporating Adder Based on Quaternary Signed Digit Number System 31st International Conference on VLSI Design and 2018 17th International Conference on Embedded Systems (VLSID), 2018 pp. 289-294
  6. S Jain, N Pandey and K Gupta, Complete Charge Recovery Diode Free Adiabatic Logic, Fifth International Conference on Signal Processing & Integrated Networks, SPIN 2018. 
  7. S Singh, Jatin, N Pandey and R Pandey, Precision Capacitance Multiplier with Low Power and High Multiplication Factor, Fifth International Conference on Signal Processing & Integrated Networks, SPIN 2018. 
  8.  D Nand, N Pandey, R Pandey and Sunchit Jindal, OFCC based Digitally Controlled Hearing Aid, Fifth International Conference on Signal Processing & Integrated Networks, SPIN 2018. 
  9.  Grover, V Gosain, N Pandey and K Gupta Arithmetic Logic Unit Using Diode Free Adiabatic Logic and Selection Unit for Adiabatic Logic Family, Fifth International Conference on Signal Processing & Integrated Networks, SPIN 2018. 
  10. S Oruganti, Y Gilhotra, N Pandey and R Pandey, New Topologies for OTRA Based Programmable Precision Half-Wave and Full-Wave Rectifiers Multiplier  Recent Developments in Control, Automation and Power Engineering RDCAPE 2017
  11. V. Gosain, V. Grover, N. Pandey, K. Gupta, Look ahead carry adder using diode free adiabatic logic family, 2017 2nd International Conference on Telecommunication and Networks (TEL-NET),
  12. A Goel, A Gupta, M Kumar ,N Pandey, V Bhatia Design of 3-Bit Current Mode Flash ADC Using WTA Based Current Comparator 2017 2nd International Conference on Telecommunication and Networks (TEL-NET),
  13. A Gupta, A Goel, M Kumar and N Pandey, Novel Architecture for Area and Delay efficient Vedic Multiplier, Recent Developments in Control, Automation and Power Engineering RDCAPE 2017
  14. R. Joshi, A. Raghuvanshi, Y. Gilhotra, S. Sharma, S. Sharma, P. Dalmia, N. Pandey, “An FPGA based floating point Gauss-Seidel iterative solver”, 14th IEEE INDICON, 2017
  15. P. Dalmia, A. Parashar, G. Aggarwal, R. Dang, N. Pandey, “Fast Combinational Architecture for a Vedic Divider”, 14th IEEE INDICON, 2017
  16. G Komanapalli, N Pandey, R Pandey, OTRA based second and third order sinusoidal oscillators and their phase noise performance, AIP Conference Proceedings 1859 (1), 020017, 2017
  17. D Nand, N Pandey, R Pandey, P Tripathi, P Gola OFCC based voltage and transadmittance mode instrumentation amplifier AIP Conference Proceedings 1859 (1), 020109, 2017
  18. R K Agrawal, N Pandey, K Gupta Implementation of PFSCL razor flipflop, 2017 International Conference on Computing Methodologies and Communication (ICCMC), pp. 6-11, 2017
  19. N Saxena, Shruti Dutta, N Pandey, K Gupta, Implementation and Performance Comparison of a Four-Bit Ripple-Carry Adder Using Different MOS Current Mode Logic Topologies, International Conference on Computational Science and Its Applications, pp. 299-313, 2017
  20. Y Nigam, R Pandey, N Pandey, Curvature compensated TIA based BGR, 4th International Conference on Signal Processing and Integrated Networks (SPIN), pp. 206-209, 2017
  21. S Gupta, K Gupta, N Pandey, Stability analysis of different dual-port SRAM cells in deep submicron region using N-Curve Method International Conference on Signal Processing and Communication (ICSC), pp. 431-436, 2016
  22. D Sachan, D Nand, N Pandey, Universal biquadratic filter using Operational Floating Current Conveyor (OFCC), Microelectronics (ICM), 2016 28th International Conference on, 317-320, pp. 317-320
  23. K Gupta, P Shukla, N Pandey, On the implementation of PFSCL adders Second International Innovative Applications of Computational Intelligence on Power, Energy and Controls with their Impact on Humanity (CIPECH), pp. 287-291, 2016
  24. V Bhatia, N Pandey, A Novel Ultra Low Power Current Comparator, International Conference on Advances in Computing and Data Sciences, 423-432, 2011
  25. S Kareer, A Kumar, K Gupta, N Pandey, A Novel Bulk Drain Connected 6T SRAM Cell,  International Conference on Advances in Computing and Data Sciences, 232-242, 2016
  26. G Singh, A Gupta, K Gupta, N Pandey, FPGA implementation of different NRZ line coding schemes, Information Processing (IICIP), 2016 1st India International Conference on, 1-7
  27. V. V. Kumar, C. Malhotra, V. K.Ahalawat, N. Pandey, R.Pandey, Voltage and Current Mode OFCC Based Semi Gaussian Shapers, 2016 IEEE 1st International Conference on Power Electronics, Intelligent Control and Energy Systems (ICPEICES)
  28. P. Tripathi,  P.Gola,  P. Pahalwan,  N. Pandey,  R. Pandey, Design of Digitally Controlled OTRA based Filter for Hearing Aid Application, 2016 IEEE 1st International Conference on Power Electronics, Intelligent Control and Energy Systems (ICPEICES)
  29. K. Gupta, S. Bagga, N. Pandey,  Efficient CVSL based Full Adder Realizations,  2016 IEEE 1st International Conference on Power Electronics, Intelligent Control and Energy Systems (ICPEICES)
  30.  A. Goel,  R. Pandey, N. Pandey, S. Yadav, Operation Trans-resistance Amplifier based low-voltage reference  2016 IEEE 1st International Conference on Power Electronics, Intelligent Control and Energy Systems (ICPEICES)
  31. C. Malhotra, V. K. Ahalawat, V V. Kumar,  R. Pandey,N. Pandey, Voltage differencing buffered amplifier based quadrature oscillator 2016 IEEE 1st International Conference on Power Electronics, Intelligent Control and Energy Systems (ICPEICES)
  32. V. Bhatia, K. Gupta, N. Batra, N. Pandey Modelling a Simple Current to Voltage Converter using Artificial Neural Networks 2016 IEEE 1st International Conference on Power Electronics, Intelligent Control and Energy Systems (ICPEICES)
  33. A. Jain, N. Pandey,  R. Pandey,  Realization of frequency-hopping filters using CDTA and VDTA, 3rd  International Conference on signal processing and integrated networks, 2016
  34. N. Saxena, S. Dutta, N. Pandey, K. Gupta,  Implementation of Asynchronous Pipeline using Transmission Gate logic, 2016 International Conference on Computational Techniques in Information and Communication Technologies (ICCTICT)
  35. K. Gupta, U Mittal, R Baghla, N. Pandey, Implementation of PFSCL Demultiplexer, 2016 International Conference on Computational Techniques in Information and Communication Technologies (ICCTICT)
  36. A Tyagi, N. Pandey, K. Gupta, PFSCL based Linear Feedback Shift Register, 2016 International Conference on Computational Techniques in Information and Communication Technologies (ICCTICT)
  37. N. Pandey, Nitish, K. Gupta, T Kuhar , Pre-scalar for Diode Free Adiabatic Logic Family 2016 International Conference on Computational Techniques in Information and Communication Technologies (ICCTICT)
  38. R. Pal, R.C.Tiwari, N.Pandey,R. Pandey, "Pulse Width Modulator  using CDBA based relaxation oscillator"  IEEE International Conference ICIIS-2014. DOI   10.1109/ICIINFS.2014.7036564 
  39.  Rajiv Ranjan, Rajeshwari Pandey, Neeta Pandey and Gavendra Singh " Linear Phase Detector Using OTRA" IEEE International Conference SPIN-2015.
  40. Rajeshwari Pandey, Neeta Pandey, Gurumurthy Komanapalli, Alok Kumar Singh and Rashika AnuragNew realizations of OTRA based sinusoidal oscillator IEEE International Conference SPIN-2015.
  41. Neeta Pandey, Pragya Tripathi, Rajeshwari Pandey, Ravi Batra OFCC based Logarithmic Amplifier International Conference on Signal Processing & Integrated Networks, 522 -525, 2014.
  42. Neeta Pandey, Nalin Dadhich, Mohd. Zubair Talha Realization of 2:4 reversible decoder and its applications, International Conference on Signal Processing & Integrated Networks, 349 – 353, 2014.
  43. Himanshu Puri, Kshitij Ghai, Kirti Gupta, Neeta Pandey A Novel DFAL based Frequency Divider, International Conference on Signal Processing & Integrated Networks 526 -530, 2014.
  44. Radhika, Neeta Pandey, Kirti Gupta, Maneesha Gupta Low Power D-latch design using MCML Tri-state Buffers. International Conference on Signal Processing & Integrated Networks, 531-535. 2014.
  45. Kirti Gupta, Neeta Pandey and Maneesha Gupta, Performance Improvement of PFSCL gates through Capacitive Coupling, International Conference on Multimedia Signal Processing and Communication Technologies (IMPACT-2013)
  46. Kirti Gupta, Radhika Tanwar, Neeta Pandey and Maneesha Gupta, A Novel High Speed MCML Square Root Carry Select Adder for Mixed-Signal Applications, International Conference on Multimedia Signal Processing and Communication Technologies (IMPACT-2013)
  47. Veepsa Bhatia, Mohini Madaan, Baljeet Kaur, Neeta Pandey and Asok Bhattacharyya, A Novel CC-II Based Current Comparator And Its Application In a Current Mode Flash ADC, International Conference on Multimedia Signal Processing and Communication Technologies (IMPACT-2013)
  48. Garima Varshney, Neeta Pandey , Rajeshwari Pandey. Asok Bhattachayya, Performance Comparison Of Filter Circuits Based On Two Different Current Conveyor Topologies, 2013 International Conference on Signal Processing and Communication.
  49. Neeta Pandey, Aseem Sayal and Rajeshwari Pandey, CDTA Based Semi Gaussian Shapers for Detector Readout Front Ends, IEEE International Conference on Circuit, Power and Computing Technologies, 2013.
  50. Neeta Pandey, Aseem Sayal and Rajeshwari Pandey, DDCCTA Based Semi Gaussian Shapers for Detector Readout Front Ends, IEEE International Conference on Circuit, Power and Computing Technologies, 2013.
  51. Neeta Pandey, Rajeshwari Pandey, Sajal.K Paul, Novel single input five output voltage mode universal filter based on DDCCTA, International Conference on Computer and Communication Technology (ICCCT-2012), Allahabad,
  52. Neeta Pandey, Sakshi Arora, and Rinku Takkar, Realization of DVCCCTA Based Mutually Coupled Circuit, International Conference on Computer and Communication Technology (ICCCT-2012), Allahabad.
  53. Rajeshwari Pandey, Neeta Pandey, Sajal K. Paul, Mandeep Singh, Manish Jain, Voltage Mode single OTRA based Biquadratic Filters, International Conference on Communication and Computer Technology,  ICCCT-12, pp, 63 – 67, Nov. 2012.
  54. Rajeshwari Pandey, Neeta Pandey, Sajal K. Paul, MOS-C Third Order Quadrature Oscillator using OTRA,” Third International Conference on Communication and Computer Technology, ICCCT-12, pp. 77 -80,  Nov. 2012.
  55. Rajeshwari Pandey, Neeta Pandey, Sajal K. Paul, Mandeep Singh, Manish Jain, Voltage Mode Biquadratic Filter using Single OTRA, Fifth India International Conference on Power Electronics, IICPE-2012, pp. 1 - 4, Dec. 2012.
  56. Ranjana Sridhar, Neeta Pandey, Veepsa Bhatia, Asok Bhattacharyya, On improving the performance of traff’s comparator, Fifth India International Conference on Power Electronics, IICPE-2012, Dec. 2012.
  57. Kirti Gupta, Neeta Pandey, Maneesha Gupta, Low Power Multi-Threshold MOS Current Mode Logic Asynchronous Pipeline Circuits, Fifth India International Conference on Power Electronics, IICPE-2012, Dec. 2012.
  58. Arun Rudra, Neeta Pandey, S. Indu, Evolutionary algorithm based combinational circuit design, Fifth India International Conference on Power Electronics, IICPE-2012, Dec. 2012
  59. Veepsa Bhatia, Neeta Pandey,  Asok Bhattacharyya, An expandable current-mode ADC with power optimization technique, Proceedings of IEEE 2012 1st International Conference on Recent Advances in Information Technology (RAIT), Digital Object Identifier: 10.1109/RAIT.2012.6194551, Publication Year: 2012 , Page(s): 765 – 770.
  60. P. Iswerya,  S. Gupta, M. Goel,  Veepsa Bhatia, Neeta Pandey, Asok Bhattacharyya, Delay area efficient low voltage FVF based current comparator, Proceedings of IEEE 2012 1st Students Conference on Engineering and Systems (SCES), Digital Object Identifier: 10.1109/SCES.2012.6199088.
  61.  Veepsa Bhatia, Neeta Pandey.  Asok Bhattacharyya,  Low power delay proficient current mode ADC design,” Proceedings of IEEE International Conference on Power, Control and Embedded Systems (ICPCES 2012).
  62. Kirti Gupta, Ranjana Sridhar, Jaya Chaudhary, Neeta Pandey, and Maneesha Gupta Performance Comparison of MCML and PFSCL Gates in 0.18 µm CMOS Technology International Conference on Computer and Communication Technology (ICCCT-2011), Allahabad, pp. 230 – 233
  63. Neeta Pandey, Sahil Kapur, Pushkar Arora, Sagar Malhotra, “MO-CCCCTA based PID controller employing grounded passive elements” International Conference on Computer and Communication Technology (ICCCT-2011) , Allahabad, pp. 270 – 273
  64. Neeta Pandey, Sahil Kapur, Pushkar Arora, Sagar Malhotra “Novel Voltage Mode Multifunction Filter based on Current Conveyor Transconductance Amplifier”, Proc. of Int. Conf. on Advances in Electrical & Electronics 2010 pp. 89 – 92
  65. Neeta Pandey, Sahil Kapur, Pushkar Arora, Sagar Malhotra “First order voltage mode MO-CCCCTA based All Pass filter”, Proc. of 2011 International Conference on Communications and Signal Processing (ICCSP),  pp. 535 -537.
  66. Neeta Pandey Rishik Bazaz Rahul Manocha, “Active RLC ladder filter simulation using newly proposed CCCCTA block”, Proc. of 2011 International Conference on Communications and Signal Processing (ICCSP),  pp.554-557
  67. Neeta Pandey, Sajal K. Paul, Asok Bhattacharyya , “A Novel Electronically Tunable Filter for Multi Standard Wireless Receiver”, Proc. of International Conference on Computer and Communication Technology (ICCCT-2010) , September 17-19, 2010, MNNIT, Allahabad, Pp.282 – 284
  68. Kirti Gupta, Neeta Pandey, Maneesha Gupta, “A Novel Active Shunt-Peaked MCML-based High Speed Four-Bit Ripple-Carry Adder”, Proc. Of International Conference on Computer and Communication Technology (ICCCT-2010), September 17-19, 2010, MNNIT, Allahabad. 285 – 289
  69. Rajeshwari Pandey, Neeta Pandey, Rajendra Kumar,and Garima Solanki “A Novel OTRA Based Oscillator with Non Interactive Control”, Proc. of  International conference on Communication and Computer Technolgy, ICCCT’10,Allahabad.p 658 – 660
  70. Kirti Gupta, Neeta Pandey, Maneesha Gupta, “Shunt-Peaking in MCML Memory Element Design in 0.18µm CMOS Technology”, Proc. of  2010 Annual IEEE India Conference (INDICON), pp. 1-4
  71. Veepsa Bhatia, Neeta Pandey and A. Bhattacharyya, “A 4-bit Expandable Algorithmic current-Mode Analog to Digital Converter for use in Digital Control Systems”,  Proc. of  India International Conference on Power Electronics 2010, p.1 – 5
  72.  Neeta Pandey, Sajal K. Paul, “Analog Filters based on 0.25 μm CMOS Differential Voltage Current Conveyor Transconductance Amplifier(DVCCTA)”, Proc. of  India International Conference on Power Electronics 2010, p. 1 – 4
  73. Sajal K. Paul, Neeta Pandey, and A. Bhattacharyya, “Current Controlled Conveyor based Transadmittance mode Universal Filter” Proc. IEEE Symposium on Industrial Electronics and Applications (ISIEA2009) Malaysia, pp. 264-267.
  74.  Neeta Pandey, Sajal K. Paul, and  A. Bhattacharyya, “CMOS Channel Select Filter For Multi Standard Wireless Receiver”  International Conference on Innovative Technologies (ICIT-09): Research and Development in Science, Technology and Management.
  75.  Kirti Gupta, Neeta Pandey, Manisha Gupta, “Low power Active Shunt-Peaked MCML-based Circuits for Mobile Applications in GHz range” International Conference on Innovative Technologies (ICIT-09): Research and Development in Science, Technology and Management.
  76. Sajal. K. Paul, Neeta Pandey, and S. B. Jain, “Realization of Plus-Type CCCIIs Based Voltage” Proc. IEEE International Symposium on Integrated Circuits (ISIC-2007), pp. 119 – 122.
  77. Sajal. K. Paul, Neeta Pandey, and S. B. Jain, “Digitally Controlled Current Mode Universal Filter” Proc. IEEE International Symposium on Integrated Circuits (ISIC-2007), pp. 572 – 575.
  78. Neeta Pandey, Sajal. K. Paul, and S. B. Jain, “A novel current mode channel select filter for Multi standard wireless receiver” accepted in IEEE region 10 conference to be held in Hyderabad during Nov. 2008.
  79. Neeta Pandey, Sajal K. Paul, Shail Bala Jain and Asok Bhattacharyya, “Electronically Tunable Current Mode Universal Filter: MIMO Approach” Proc. 3rd International Conference on Computers and Devices for Communication (CODEC-06), pp. 170 – 173.
  80. Neeta Pandey, Sajal K. Paul, Asok Bhattacharyya and S. B. Jain, “Voltage Mode Tow Thomas Universal Filter:  A Current Controlled Conveyor Approach” Proceedings of General Assembly of International Union of Radio Sciences held in Delhi from Oct. 23-29, 2005.
  81. Neeta Pandey, Sajal K. Paul, Asok Bhattacharyya “An insensitive current mode universal biquad: multi-input multi-output” Proceedings of IEEE International Symposium on Circuits and Systems held in Kobe, Japan, pp. 3399-3902, 2005.
  82. Neeta Pandey, Sajal K. Paul, “Realization of current mode multifunction filter using translinear conveyor”, Proceedings of International Conference on Computers and Devices for Communication, Kolkata, Jan 1-3, 2004.
  83. Neeta Pandey, Sajal K. Paul, “Realization of Tow Thomas Biquad Using Translinear Current Conveyors”, Proceedings of International Conference on Communication, Device and Intelligent Systems, Kolkata, pp. 243-246, Jan 8-10, 2004.

 

National Conference:

1. Neeta Pandey, Sajal K. Paul, Asok Bhattacharyya, “Single CCII- and CCCII-based all pass filters- New generic configurations” International Conference on Electronic and Photonic  Materials,         Devices and Systems – 2006

2. Neeta Pandey and Sajal K. Paul, “All pass filter based on CCCII with negative intrinsic resistance” Horizon of Telecommunications held in Calcutta from Feb. 3 – 5, 2003.

3. Neeta Pandey and Sajal K. Paul, “All pass filter based on CCII and CCCII” National Conference on Microchip Design and Technology held in Maharaja Surajmal Institute of Technology, Delhi from       Mar. 6-8, 2003.

4. I. J. Kumar and Neeta Pandey, “Fuzzy logic approach to cryptosystem synthesis” National Conference on Information Security held in Bharati Vidyapeeth’s College of Engineering from Jan. 8-9, 2003.

5. Veepsa Bhatia, Neeta Pandey and H. M. Rai, “Improving Signal Processing with ADCs based on current mode algorithm” in National Seminar on Cutting edge technologies in electronic communication held in Sant Longowal Institute of Technology Mar. 14, 2004.

6.  Neeta Pandey and Veepsa Bhatia, “Improving Signal Processing with ADCs : A current mode approach” in National Conference on VLSI Design and Technology held in Bharati Vidyapeeth’s College of Engineering from Apr. 15-16, 2004.

7.  Neeta Pandey, Sajal K. Paul, Asok Bhattacharyya , “A Novel Electronically Tunable Filter for Multi Standard Wireless Receiver” Proceedings of IETE Mid Term Symposium 2005, pp.179-184

 

 

 

 

Last Updated : 2019-05-15 17:07:10